Register LVL_SHFTR_EN Details - Register LVL_SHFTR_EN Details - 1.15 English - UG585

Zynq 7000 SoC Technical Reference Manual (UG585)

Document_ID
UG585
Release_Date
2026-02-06
Version
1.15 English
Field Name Bits Type Reset Value Description
reserved 31:5 rw 0x0 Reserved. Writes are ignored, read data is zero.
reserved 4 rw 0x0 Reserved. Do not modify.
USER_LVL_SHFTR_EN 3:0 rw 0x0

Level shifter enable to drive signals between PS and PL.

0x0 = disable all level shifters

0xA = enable PS-to-PL level shifters

0xF = enable all level shifters

All other = reserved