| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| Ev | 5 | clronrd | 0x0 | Event timer overflow interrupt |
|
XTTCPS_IXR_CNT_OVR_MASK (IXR_CNT_OVR) |
4 | clronrd | 0x0 | Counter overflow |
|
XTTCPS_IXR_MATCH_2_MASK (IXR_MATCH_2) |
3 | clronrd | 0x0 | Match 3 interrupt |
|
XTTCPS_IXR_MATCH_1_MASK (IXR_MATCH_1) |
2 | clronrd | 0x0 | Match 2 interrupt |
|
XTTCPS_IXR_MATCH_0_MASK (IXR_MATCH_0) |
1 | clronrd | 0x0 | Match 1 interrupt |
|
XTTCPS_IXR_INTERVAL_MASK (IXR_INTERVAL) |
0 | clronrd | 0x0 | Interval interrupt |