Register CHE_UNCORR_ECC_DATA_31_0_REG_OFFSET Details - Register CHE_UNCORR_ECC_DATA_31_0_REG_OFFSET Details - 1.15 English - UG585

Zynq 7000 SoC Technical Reference Manual (UG585)

Document_ID
UG585
Release_Date
2026-02-06
Version
1.15 English
Field Name Bits Type Reset Value Description
UNCORR_ECC_LOG_DAT_31_0 31:0 ro 0x0 bits [31:0] of the data that caused the captured uncorrectable ECC error. (Data associated with the first ECC error if multiple errors occurred since UNCORR_ECC_LOG_VALID was cleared). Since each ECC engine handles 8-bits of data, only the lower 8-bits of this register have valid data. The upper 24-bits will always be 0.