The associated "FPGA_RST_CTRL.FPGA_AXDSN_RST" register field must be written with "0" before accessing this register
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| reserved | 31:5 | raz | 0x0 | Return 0 when read |
| OutWrCmds | 4:1 | ro | 0x0 |
Returns the number of write commands in flight between the AXI_HP and the SAM switch 4'h0: 0 4'h1: 1 etc |
| WrDataFifoOverflow | 0 | ro | 0x0 | Bit is set if the WrDataFIFO overflows |