Key features of the JTAG debug interface are:
- JTAG 1149.1 boundary scan support
- Two 1149.1 compliance TAP controllers: One JTAG TAP controller and one Arm DAP
- Single unique IDCODE from the AMD TAP for each of the Zynq 7000 family of devices
- IEEE 1532 programming in-system-configurable (ISC) devices support
- eFuse programming
- BBRAM programming
- XADC access
- On-board flash programming
- AMD chipscope debug support
- Arm CoreSight debug center control using Arm DAP
- Indirect PS address space access through DAP-AP port
- External trace capture using MIO in PS, or EMIO in PL