ECC Initialization - ECC Initialization - 1.15 English - UG585

ECC is supported in 16-bit bus mode only. When enabled, a write operation computes and stores an ECC code along with the data, and a read operation reads and checks the data against the stored ECC code. It is therefore possible to receive ECC errors when reading uninitialized memory locations. To avoid this problem, all memory locations must be written before being read. Note that, because ECC is computed and checked over a byte resolution, a read of 1 byte is done to a 16-bit location that has only that byte initialized (second byte of 16-bit location is uninitialized) does not result in an ECC error. The controller only checks ECC on the byte that has been read. Writing to the entire DDR DRAM through the CPU can be time intensive. It might be worthwhile to use a DMA device to generate larger bursts to the DDR controller initialization and offload the CPU. Note that only the Arm® CPU and ACP interfaces can access the lowest 512 KB of DDR (see Address Map), CPU software may still need to initialize this region of ECC-based DDR.