VCCO
Refer to the UltraScale Architecture SelectIO Resources User Guide (UG571) for details on the general VCCO requirements. The VCCO requirements and optional internal differential terminations for LVAUX I/O standards are described in Table 1. When the device is in LVAUX mode, VCCO must be 1.2V on all HP I/O banks. For all HD I/O banks, VCCO has the same requirements and specifications as standard operating mode.
VREF
Refer to the UltraScale Architecture SelectIO Resources User Guide (UG571) for details regarding the VREF supply requirements.
VCCAUX
When designing with the XQ ruggedized devices in standard operating mode or LVAUX mode, the VCCAUX supply must be maintained at 1.8V. In the case of SEL mitigation, this supply can be power cycled to remove an SEL condition. Refer to the UltraScale+ device data sheets for guidance on this power supply. If the minimum voltage is not maintained, the device power-on reset is triggered.
VCCAUX_IO, VCCAUX_HPIO, and VCCAUX_HDIO
In XQ ruggedized UltraScale+ devices, the VCCAUX_IO pins are split for the HD and HP I/O banks, as identified in the package files for these devices in the Package File Portal. The combined set of VCCAUX_HPIO pins and VCCAUX_HDIO pins in the XQ ruggedized packaging for Kintex UltraScale+ FPGAs and Zynq UltraScale+ devices replace the VCCAUX_IO pins that are used in the XC packages.
To operate the XQ ruggedized UltraScale+ device in LVAUX mode, VCCAUX_HPIO must be powered at 1.2V and VCCAUX_HDIO must be powered at 1.8V.
To operate the XQ ruggedized device in standard operating mode, use a single 1.8V supply for all VCCAUX_HDIO pins and VCCAUX_HPIO pins (or VCCAUX_IO pins for Virtex UltraScale+ FPGAs without HD I/O pins only). Apply guidance from the UltraScale Architecture SelectIO Resources User Guide (UG571) about VCCAUX_IO to these pins.