Summary of LVAUX Mode versus Standard Operating Mode

The following table lists the key differences when operating a device in standard operating mode versus LVAUX mode.

Table 1. Key Differences Between Standard Operating Mode and LVAUX Mode
Standard Operating Mode	LVAUX Mode
Power Considerations
V_CCAUX = 1.8V	No change
V_CCAUX, V_{CCAUX_IO}, V_{CCAUX_HPIO}, and V_{CCAUX_HDIO} must be powered with 1.8V. VCCAUX_HPIO and VCCAUX_HDIO pins can be considered to be the same as the VCCAUX_IO pins on XC equivalent devices. Follow the standard guidance for these supplies.	V_CCAUX and V_{CCAUX_HDIO} must be powered with 1.8V. V_{CCAUX_HPIO} must be powered with 1.2V to prevent the possibility of SEL on the auxiliary HP I/O blocks in the XQ ruggedized device.
The V_CCO supply for HP and HP I/O pins should be powered in accordance with standard device guidance for standard operating mode.	The supply V_CCO for HP I/O pins must not exceed the V_{CCAUX_HPIO} supply voltage. The VCCO pins of unused HP I/O pins must be powered on and must be connected to the V_{CCAUX_HPIO} supply voltage. V_CCAUX, V_{CCAUX_HPIO}, and V_{CCAUX_HDIO} must be powered on for the device to operate as intended. V_{CCAUX_HPIO} and V_CCO for HP I/O pins must be powered at 1.2V to avoid SEL on the HP I/O auxiliary blocks even if no HP I/O pins are used in the design. However, in this special scenario where no HP I/O pins are used, these voltage supplies can share another 1.2V supply when used for another function on this device. V_CCO for HD I/O pins should be powered in accordance with standard device guidance for standard operating mode.
Estimate power and current consumption of combined HP I/O and HD I/O using Xilinx Power Estimator	Estimate power and current consumption of HP I/O only using Xilinx Power Estimator and guidelines in Estimating Power Estimate power and current consumption of HD I/O only using Xilinx Power Estimator and guidelines in Estimating Power
ESD Considerations
Do not connect unused VCCO pins to GND.	No change
To reduce ESD, a general recommendation is to connect all unused VCCO pins to a valid power supply.	No change
Unused I/Os can be connected to the same potential as V_CCO or left floating.	Unused HP I/O pins must be powered by V_CCO = 1.2V for HP I/O banks. Where applicable, unused HD I/O banks can be connected to the same potential as V_CCO or left floating.
Vivado Design Suite Considerations
N/A	The LVAUX I/O standards and DDR4 SDRAM (MIG) in the IP catalog are fully supported by Vivado Design Suite 2019.2 or later for XQ ruggedized UltraScale+ devices only.
N/A	If an HP I/O bank uses an LVAUX I/O standard, all HP I/O banks must use LVAUX I/O standards.
Memory Considerations
See the specific UltraScale+ data sheet in References for the maximum physical interface (PHY) rate for memory interfaces.	See Table 1.
System Monitor External Analog Input Considerations
System monitor external analog inputs supported in HP I/O and HD I/O banks.	System monitor external analog inputs supported in HD I/O banks only–not supported in LVAUX mode HP I/O banks.

Summary of LVAUX Mode versus Standard Operating Mode - UG584

Using LVAUX Mode in XQ Ruggedized UltraScale+ Devices for Airborne Systems Design Guide (UG584)