SSTL12_LVAUX and DIFF_SSTL12_LVAUX

SSTL12_LVAUX and DIFF_SSTL12_LVAUX are SSTL standards. See the SSTL section in the UltraScale Architecture SelectIO Resources User Guide (UG571) for information on how SSTL standards typically function. Except for the differences highlighted in this section, SSTL12_LVAUX and DIFF_SSTL12_LVAUX function the same way as SSTL12 and DIFF_SSTL12.

SSTL12_LVAUX and DIFF_SSTL12_LVAUX are SSTL I/O standards for 1.2V.
SSTL12_LVAUX and DIFF_SSTL12_LVAUX only support DDR4 memory. They do not support the Micron Next Generation RLDRAM3 memory.
SSTL12_LVAUX and DIFF_SSTL12_LVAUX are only available for HP I/O banks.
SSTL12_LVAUX and DIFF_SSTL12_LVAUX supports 40Ω for the source termination feature (OUTPUT_IMPEDENCE). They do not support a 60Ω or 48Ω source termination feature.
SSTL12_LVAUX and DIFF_SSTL12_LVAUX support ODT values of RTT_40 and RTT_60 only. They do not support an ODT value of RTT_NONE.
DIFF_SSTL_LVAUX only supports DQS_BIAS set to FALSE.

Table 1. SSTL12_LVAUX Allowed Attributes
Attributes	Primitives
	IBUF/IBUF3/IBUFDS/IBUFDSE3		OBUF/OBUFT		IOBUF/IOBUFE3/IOBUFDS/IOBUFDSE3
	HP I/O Banks		HP I/O Banks		HP I/O Banks
	Allowed Values	Default	Allowed Values	Default	Allowed Values	Default
IOSTANDARD	SSTL12_LVAUX		SSTL12_LVAUX		SSTL12_LVAUX
SLEW	N/A		FAST MEDIUM SLOW	SLOW	FAST MEDIUM SLOW	SLOW
ODT	RTT_40 RTT_60	RTT_40	N/A		RTT_40 RTT_60	RTT_40
OUTPUT_IMPEDENCE	N/A		RDRV_40_40	RDRV_40_40	RDRV_40_40	RDRV_40_40
IOSTANDARD	DIFF_SSTL12_LVAUX		DIFF_SSTL12_LVAUX		DIFF_SSTL12_LVAUX
SLEW	N/A		FAST MEDIUM SLOW	SLOW	FAST MEDIUM SLOW	SLOW
DQS_BIAS	FALSE	FALSE	N/A		FALSE	FALSE
ODT	RTT_40 RTT_60	RTT_40	N/A		RTT_40 RTT_60	RTT_40
OUTPUT_IMPEDENCE	N/A		RDRV_40_40	RDRV_40_40	RDRV_40_40	RDRV_40_40

SSTL12_LVAUX and DIFF_SSTL12_LVAUX - UG584

Using LVAUX Mode in XQ Ruggedized UltraScale+ Devices for Airborne Systems Design Guide (UG584)