SEL Impact - UG584

For XC, XA, and XQ devices operating within the Earth’s atmosphere, the SYSMON SEL currents are a few hundred mA or less with no impact to device-level silicon. The SEL currents associated with the HP I/O auxiliary blocks can be up to 1A and while this is not destructive damage to the device, there can be electrically induced physical damage (EIPD) in a metal layer in the device. This could cause a long-term reliability impact, even while the device might not exhibit any functional degradation in the near term.

Note: For XQ ruggedized UltraScale+ devices operated in LVAUX mode, the SEL events on HP I/O auxiliary blocks are eliminated. Only the SYSMON SEL currents (up to a few hundred mA or less) remain and have no impact on the device-level silicon. Refer to the SEL Mitigation Options Overview for further details on the available methods to mitigate SEL.

The impact of an SEL event on the SYSMON can manifest as either a frozen reading of the SYSMON ADCs seen as a constant count value reading from the ADC, or an extreme reading of the die temperature, such as an out of bounds T_j reading for either extreme cold or hot. If any one of these conditions is present, the SYSMON that is being read has been upset. In designs using a Zynq UltraScale+ device, there are two SYSMON blocks, and one can still read an accurate die temperature even if the other has been affected by an SEL event.

The impact of an SEL event on an HP I/O auxiliary block can be less obvious, if even apparent at all to device function. The affected HP I/O auxiliary block controls the digitally-controlled impedance (DCI) and level shifting for the HP I/O pin. In most cases, it will be masked with no impact to the system. Several reasons exist for this outcome:

The DCI is not necessary in most applications running at 2400 Mb/s or slower.
The level shifting impacts can be masked by forgiveness in the I/O standard because an interface device might accept signaling outside of parameters of the selected interface standard.
The HP I/O pin might not be used because either the design does not use all available HP I/O pins in the package or the device has more HP I/O pins and HP I/O auxiliary blocks than are bonded out in the package chosen.

To determine whether an SEL mitigation method is necessary, consider the different measures of SEL impact to the system along with the duration between power cycling of the device in the system. AMD testing included holding several devices in the latched-up state for hundreds of hours without any effect beyond the increased current draw. The most prudent method is to detect and power cycle to clear the SEL in a shorter time frame to best balance impacts on the end system. For some systems, power could be applied nearly continuously for days, months, or years without normal power cycling. Other systems might have a shorter mission duration of a few hours or a day at a time, with power cycled following the mission. It could be sufficient to do nothing in the case of the shorter time frame between power cycling; therefore, SEL mitigation might not be necessary. In assessing the impact and whether mitigation is necessary, consider the expected operating lifetime of a device in the system, the duration between power cycling of the device in the system, the probability of an SEL event in a device operating lifetime in the system, the total application SEL rate across the total volume of deployed device operating hours, and other architectural mitigation or background functional monitoring of this device in the system.

Following an assessment of the SEL rate, if mitigation is needed, read on. When SEL mitigation is not necessary for the application, no further information from this document is needed. If SEL mitigation is not being used, then there could be up to 1A of additional current drawn on the 1.8V HP I/O auxiliary supply, leading to an additional 1.8W being dissipated within the device. These two factors should be accounted for in applications that are designed to ride through SEL events without additional monitoring.