See the Rules for Combining I/O Standards in the Same Bank section in the UltraScale Architecture SelectIO Resources User Guide (UG571) for details on how to combine different input, output, and bidirectional standards in the same bank. When using the device in LVAUX mode, all HP I/O banks must be set to an LVAUX I/O standard. The following table summarizes the VCCO and VREF requirements for each LVAUX I/O standard. AMD recommends to separate LVDS12_LVAUX and MIPI_DPHY_LVAUX I/O pins from memory interfaces.
I/O Standard | I/O Bank Availability | VCCO (V) for HP I/O Banks | VREF (V) | ||
---|---|---|---|---|---|
Output | Input | Input with DIFF_TERM_ADV and DIFF_TERM Support | Input | ||
LVCMOS12_LVAUX | HP | 1.2 | 1.2 | N/A | N/A |
SSTL12_LVAUX | HP | 1.2 | 1.2 | N/A | 0.6V |
DIFF_SSTL12_LVAUX | HP | 1.2 | 1.2 | N/A | N/A |
AIO12_LVAUX | HP | 1.2 | 1.2 | N/A | 0.3V |
DIFF_AIO12_LVAUX | HP | 1.2 | 1.2 | 1.2 | N/A |
LVDS12_LVAUX | HP | 1.2 | 1.2 | 1.2 | N/A |
MIPI_DPHY_LVAUX | HP | 1.2 | 1.2 | 1.2 | N/A |
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The following table summaries the DRIVE and SLEW attribute options and bidirectional buffer availability for each LVAUX I/O standard.
I/O Standard | I/O Bank Type | Output Slew | Output Drive | Bidirectional Buffers | Termination Type | |||
---|---|---|---|---|---|---|---|---|
HP I/O Banks | HP I/O Banks | Input | Output | |||||
Allowed Values | Default | Allowed Values | Default | |||||
LVCMOS12_LVAUX | HP |
SLOW MEDIUM FAST |
SLOW | 8 | 8 | Yes | None | None |
SSTL12_LVAUX | HP |
SLOW MEDIUM FAST |
SLOW | N/A | N/A | Yes | Split | Driver |
DIFF_SSTL12_LVAUX | HP |
SLOW MEDIUM FAST |
SLOW |
N/A |
N/A | Yes | Split | Driver |
LVDS12_LVAUX 1 | HP | N/A | N/A | N/A | N/A | Yes | DIFF_TERM_100 | None |
DIFF_AIO12_LVAUX | HP | SLOW MEDIUM FAST |
SLOW | N/A | N/A | Yes | Single | Driver |
AIO12_LVAUX | HP | SLOW MEDIUM FAST |
SLOW | N/A | N/A | Yes | Single | Driver |
MIPI_DPHY_LVAUX | HP | N/A | N/A | N/A | N/A | No | DIFF_TERM_100 | Driver |
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