LVAUX Mode Overview - UG584

Using LVAUX Mode in XQ Ruggedized UltraScale+ Devices for Airborne Systems Design Guide (UG584)

Document ID
UG584
Release Date
2024-05-03
Revision
1.1 English

This section illustrates the differences between standard operating mode and LVAUX mode and provides a broad overview on how to configure the XQ ruggedized device in LVAUX mode. The main differences involve applying the LVAUX I/O standards to HP I/O banks and changing the auxiliary HP I/O power supply voltage (VCCAUX_IO) configuration.

Only XQ UltraScale+ devices in ruggedized packages can be used in LVAUX mode. XQ Kintex UltraScale+ and Zynq UltraScale+ ruggedized packages support separated auxiliary supplies for the HP I/O and HD I/O. Correspondingly, these XQ Kintex UltraScale+ and Zynq UltraScale+ ruggedized packages have unique pin names for the HP I/O auxiliary voltage supply rail (VCCAUX_HPIO) and the high-density (HD) I/O auxiliary voltage supply rail (VCCAUX_HDIO). The VCCAUX_HPIO supply powers the auxiliary HP I/O circuity, and the VCCAUX_HDIO supply powers the auxiliary HD I/O circuity.

In standard operating mode, the VCCAUX_HDIO and VCCAUX_HPIO power supply pins should be connected to a common VCCAUX_IO supply. VCCAUX_IO is shared with VCCAUX and both are powered at 1.8V. In AMD documentation, the VCCAUX_HPIO and VCCAUX_HDIO supplies are collectively referred to as VCCAUX_IO. The References section lists the documentation used to operate the device in standard operating mode.

Important: The XQ Virtex UltraScale+ devices do not have HD I/O, and thus their package VCCAUX_IO pins are inherently isolated to supply auxiliary power to only the HP I/O. References and LVAUX mode recommendations for the VCCAUX_HPIO supply/pins through the remainder of this document are applicable to the XQ Virtex UltraScale+ device VCCAUX_IO supply/pins. See the Special Considerations for XQ Ruggedized FPGAs section for additional details.

The rest of this document details how to operate the device in LVAUX mode. For any operation or specification not mentioned in this document, AMD recommends following the standard guidelines provided in the documents listed in References. For example, to operate the device in LVAUX mode, the specification for VCC_PSAUX is not changed. Therefore, you can refer to the applicable documents listed in References for guidance.

In the ruggedized packaging, the VCCAUX_IO pins are split and referred to as VCCAUX_HDIO and VCCAUX_HPIO pins. This split allows different supply voltages operating the device in LVAUX mode. VCCAUX_HPIO and VCCO for all HP I/O banks must be powered by 1.2V when operating in LVAUX mode. All HP I/O pins used in the design must be set to the LVAUX I/O standards in the AMD Vivado™ Design Suite. Refer to the 1.2V LVAUX I/O Standards list. The VCCAUX_HDIO and VCCAUX supplies must always be powered at 1.8V. For all HD I/O banks, VCCO has the same requirements and specifications as standard operating mode.

All XQ references in this user guide are specific to the UltraScale+ devices available in XQ ruggedized packages. See the Defense-Grade UltraScale Architecture Data Sheet: Overview (DS895) for further information regarding the available XQ ruggedized devices.