DC I/O Levels - UG584

Using LVAUX Mode in XQ Ruggedized UltraScale+ Devices for Airborne Systems Design Guide (UG584)
Document ID
UG584
Release Date
2024-05-03
Revision
1.1 English
Table 1. SelectIO DC Input and Output Levels for HP I/O Banks
I/O Standard 1 VIL VIH VOL VOH IOL IOH
V, Min V, Max V, Min V, Max V, Max V, Min mA mA
LVCMOS12_LVAUX –0.300 35% VCCO 65% VCCO VCCO + 0.300 0.450 VCCO – 0.450 8.0 8.0
SSTL12_LVAUX –0.300 VREF – 0.100 VREF + 0.100 VCCO + 0.300 VCCO/2 – 0.150 VCCO/2 + 0.150 8.0 –8.0
MIPI_DPHY_ LVAUX_LP –0.300 0.550 0.880 VCCO + 0.300 0.050 1.100 0.01 –0.01
  1. Tested according to relevant specifications.
Table 2. DC Input Levels for Single-ended AIO12_LVAUX I/O Standard
I/O Standard 1 VIL VIH
V, Min V, Max V, Min V, Max
AIO12_LVAUX –0.300 VREF – 0.068 2 VREF + 0.068 2 VCCO + 0.300
  1. Tested according to relevant specifications.
  2. VREF = VCCO/4
Table 3. Differential SelectIO DC Input and Output Levels
I/O Standard VICM (V) 1 VID (V) 2 VILHS 3 VIHHS 3 VOCM (V) 4 VOD (V) 5
Min Typ Max Min Typ Max Min Max Min Typ Max Min Typ Max
MIPI_DPHY_ LVAUX_HS 6 0.070 – 0.330 0.070 – – –0.040 0.460 0.150 0.200 0.250 0.140 0.200 0.270
  1. VICM is the input common mode voltage.
  2. VID is the input differential voltage (Q – Q).
  3. VIHHS and VILHS are the single-ended input high and low voltages, respectively.
  4. VOCM is the output common mode voltage.
  5. VOD is the output differential voltage (Q – Q).
  6. High-speed option for MIPI_DPHY_LVAUX. The VID maximum is aligned with the standard’s specification. A higher VID is acceptable as long as the VIN specification is also met.
Table 4. Complementary Differential SelectIO DC Input and Output Levels for HP I/O Banks
I/O Standard VICM (V) 1 VID (V) 2 VOL (V) 3 VOH (V) 4 IOL IOH
Min Typ Max Min Max Max Min mA mA
DIFF_SSTL12_LVAUX 0.300 0.600 0.63 0.100 – (VCCO/2) – 0.150 (VCCO/2) + 0.150 8.0 –8.0
  1. VICM is the input common mode voltage.
  2. VID is the input differential voltage.
  3. VOL is the single-ended low-output voltage.
  4. VOH is the single-ended high-output voltage.
Table 5. DC Input Levels for Differential AIO I/O Standard
I/O Standard 1, 2 VICM (V) VID (V)
Min Typ Max Min Max
DIFF_AIO12_LVAUX 0.22 0.30 0.38 0.16 –
  1. Tested according to relevant specifications.
  2. Standards specified using the default I/O standard configuration. For details, see the UltraScale Architecture SelectIO Resources User Guide (UG571).
Table 6. DC Output Levels for Single-ended and Differential AIO_LVAUX Standards
Symbol Description 1, 2 VOUT Min Typ Max Units
ROL Pull-down resistance VOM_DC (as described in Table 7) 24 40 56 Ω
ROH Pull-up resistance VOM_DC (as described in Table 7) 24 40 56 Ω
  1. Tested according to relevant specifications.
  2. Standards specified using the default I/O standard configuration. For details, see the UltraScale Architecture SelectIO Resources User Guide (UG571).
Table 7. Definitions for DC Output Levels for Single-ended and Differential AIO12_LVAUX Standards
Symbol Description All Speed Grades Units
VOM_DC 1 DC output mid-measurement level (for IV curve linearity) 0.8 x VCCO V
  1. The driver for the VOM_DC level using the AIO12_LVAUX standard is similar to the driver for the POD12 standard.

LVDS12_LVAUX

The following table contains the DC specifications for the LVDS12_LVAUX I/O standard. When the LVDS12_LVAUX I/O standard is used as a transmitter (TX), it can drive the reduced range receivers (RX) specified in the IEEE Std 1596.3-1996. AMD recommends placing TX and RX on the same PCB to minimize the ground difference between them.

Table 8. LVDS12_LVAUX DC Specifications
Symbol DC Parameter Conditions Min Typ Max Units
VCCO Supply voltage for HP I/O banks 1.164 1.200 1.236 V
VCCAUX_HPIO Auxiliary HP I/O supply 1.164 1.200 1.236 V
VOH Output High voltage for Q and Q signals RT = 100Ω across Q and Q signals – – 1.236 V
VOL Output Low voltage for Q and Q signals RT = 100Ω across Q and Q signals 0.825 – – V
VODIFF 1 Differential output voltage:

(Q – Q), Q = High

(Q – Q), Q = High

 RT = 100Ω across Q and Q signals 150 222 300 mV
VOCM 1 Output common-mode voltage RT = 100Ω across Q and Q signals 0.900 1.000 1.200 V
VIDIFF 2 Differential input voltage:

(Q – Q), Q = High

(Q – Q), Q = High

 Common-mode input voltage = 1.00V 100 222 400 2 mV
VICM_DC 3, 4 Input common-mode voltage (DC coupling) 0.825 1.200 1.380 V
Differential termination Programmable differential termination (TERM_100) for HP I/O banks –50% 100 50% Ω
  1. VOCM and VODIFF values are for LVDS_PRE_EMPHASIS = FALSE.
  2. Maximum VIDIFF value is specified for the maximum VICM specification. With a lower VICM, a higher VDIFF is tolerated only when the recommended operating conditions and overshoot/undershoot VIN specifications are maintained.
  3. Input common mode voltage for DC coupled configurations. EQUALIZATION = EQ_NONE (Default).
  4. AC coupled common mode (VICM_AC) is not supported by the LVDS12_LVAUX I/O standard.