Bank Locations of Dedicated and Multi-Function Pins

UltraScale+ Device Packaging and Pinouts Product Specification User Guide (UG575)

Document ID
UG575
Release Date
2023-05-10
Revision
1.19 English

In all UltraScale and UltraScale+ devices, bank 65 contains the multi-function configuration pins. Bank 0 contains the dedicated configuration pins.

In This Figure through This Figure , the multi-function configuration bank 65 is shown adjacent to the SYSMON/CFG blocks. For devices with multiple super logic regions (SLRs), banks 60 and 70 are also shown adjacent to the SYSMON/CFG blocks. Due to the architectural differences between these and other banks, special consideration must be taken when using them under certain conditions. See the State of I/Os During and After Configuration and the Special DCI Requirements in Some Banks sections of UltraScale Architecture SelectIO Resources User Guide ( UG571 ) for details.

For UltraScale devices, all dedicated configuration I/Os (bank 0) and HR I/Os are 1.5V to 3.3V capable.

For UltraScale+ devices, all dedicated configuration I/Os (bank 0) and HR I/Os are 1.5V to 1.8V capable.