The UltraRAM key features are:
- 288K bits of storage in a single block.
- Dual port, 4K x 72, single clock synchronous memory.
- UltraRAM cascade for building larger blocks . UltraRAM has dedicated routing resources for appropriate inputs and outputs to cascade from lower UltraRAM to upper UltraRAM.
- Error correction coding (ECC) on both ports with single bit error detection and correction and double bit error detection.
- Sleep power saving features.
- Automatic power savings through automatic invocation/release of the sleep mode in a chain of UltraRAM blocks.
- Optional pipeline flip-flops on the inputs, outputs, and cascade paths.
- Data out reset capability for outputs to be reset to all 0's.
- Single port width of x72.
- The UltraRAM memory is initialized to all 0's during power up or device reset. There is no user defined INIT attribute and therefore the content of the SRAM array cannot be initialized to user defined values.