The block RAM systolic mode allows an application to write input data or cascaded data into a block RAM as shown in the following figure. At a later cycle, the application can then select to read data from a lower block RAM and write into the next upper block RAM. Data can be read from any dynamically selected block RAM in the cascade chain. The input multiplexer dynamically selects the DIN data or the cascaded data output from the lower block RAM to write to the current block RAM. The block RAM output multiplexer always selects the block RAM output data that is then presented on the data output directly or via the optional register. The DO_REG attribute determines if the optional register is used. In this cascade mode, the length of the cascade chain is limited to within one clock region.
Figure 1. Block RAM Cascade – Arrayed (Systolic) Data in Cascade
