Both block RAM and FIFO implementations of the 36 Kb block RAM support a 64-bit ECC implementation. The code is used to detect single- and double-bit errors in block RAM data read out. Single-bit errors are then corrected in the output data.
Both block RAM and FIFO implementations of the 36 Kb block RAM support a 64-bit ECC implementation. The code is used to detect single- and double-bit errors in block RAM data read out. Single-bit errors are then corrected in the output data.