Address Bus – ADDR_A, ADDR_B - Address Bus – ADDR_A, ADDR_B - UG573

UltraScale Architecture Memory Resources User Guide (UG573)

Document ID
UG573
Release Date
2025-11-18
Revision
1.14 English

The 23-bit address bus selects the memory cells for read or write. The lower 12 bits are used to select memory cells within the 4K location in each UltraRAM. The upper 11 bits select the UltraRAM that is used for cascading multiple UltraRAMs to form deep memory arrays. Each UltraRAM has a built-in comparator, which compares the upper 11 bit address with a unique SELF_ADDR attribute to identify if the UltraRAM has been selected. The SELF_MASK attribute defines how many of the 11 bit addresses should be used for the compare.