Writing to the DRP Port

UltraScale Architecture Clocking Resources User Guide (UG572)

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1.10.2 English

1. Put the address to write to and the data that needs to be written on the buses, DADDR[n:0] and DI[15:0] respectively.

2. Make the DWE (Data Write Enable) signal High.

3. Pulse the DEN signal High for one clock cycle. The DEN signal is the trigger that makes the DRP port function. When this signal is captured on the rising edge of the clock the internals of the DRP port capture address and data and fill the correct register in the DRP map.

4. When the DEN signal goes Low for one pulse, make the DWE signal Low.

5. The DRP ports pulse the DRDY High for a clock cycle to confirm that the provided data is written into the provided address space. This also signals that a new write or read operation can start.

Figure 3-20: Writing to the DRP Port

X-Ref Target - Figure 3-20