The VHDL and Verilog code for all clocking resource primitives and Vivado tools language templates are available in the UltraScale Architecture Libraries Guide (UG974) [Ref 7] .
The Clocking Wizard helps to correctly set up the MMCM and PLL resources. Additionally, the Clocking Wizard reports the jitter and supports phase and frequency synthesis. See LogiCORE IP Clocking Wizard User Guide (PG065) [Ref 8] for more information.