Example 1 - UG572

UltraScale Architecture Clocking Resources User Guide (UG572)

Document ID
UG572
Release Date
2025-05-29
Revision
1.11 English

Assume that a division of 2.5 is required, then:

  • Counter A would take phase 0 (0 degrees) of the VCO
  • Counter B would take phase 4 (180 degree offset)

Output starts High with rising edge on counter A and goes Low with second rising edge counter B. It goes High again with second rising edge of counter A after that and so on.

Figure 1. Fractional Counter Mode Example 1