DI[15:0] – Dynamic Reconfiguration Data Input

UltraScale Architecture Clocking Resources User Guide (UG572)

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1.10.2 English

The dynamic reconfiguration data input (DI) bus provides reconfiguration data. The value of this bus is written to the configuration cells. The data is presented in the cycle that DEN and DWE are active. The data is captured in a shadow register and written at a later time. DRDY indicates when the DRP port is ready to accept another write. When not used, all bits must be set to zero.