Counter Control - UG572

UltraScale Architecture Clocking Resources User Guide (UG572)

Document ID
UG572
Release Date
2025-05-29
Revision
1.11 English

The MMCM output counters provide a wide variety of synthesized clocks using a combination of DIVIDE, DUTY_CYCLE, and PHASE. The following figure illustrates how the counter settings impact the counter output.

The top waveform represents the output from the VCO.

Figure 1. Output Counter Clock Synthesis Examples