Clock Buffers and Clock Routing

Global clocks are a dedicated network of interconnects specifically designed to reach all clock inputs to the various resources in a device. These networks are designed to have low skew and low duty cycle distortion, low power, and improved jitter tolerance. They are also designed to support very high-frequency signals.

Understanding the signal path for a global clock expands the understanding of the various global clocking resources. The global clocking resources and network consist of these paths and components:

• Clock Structure

• Clock Buffers

• BUFGCTRL Clock Buffer Primitives

• Additional BUFGCTRL Use Models

• BUFGCE Clock Buffers

• BUFG Clock Buffer

• BUFCE_LEAF Clock Buffer