CLKFBOUT – Dedicated PLL Feedback Output - UG572

UltraScale Architecture Clocking Resources User Guide (UG572)

Document ID
UG572
Release Date
2025-05-29
Revision
1.11 English

For the possible configurations of CLKFBOUT, see the following figures. Unlike the MMCM, the CLKFBOUT cannot drive logic.

Figure 1. Clock Deskew Using BUF_IN Compensation Mode
Figure 2. PLL Internal Feedback
Note: The Spartan UltraScale+ device PLLE4XP does not have a CLKOUTPHY port.