Single-Termination DCI

UltraScale Architecture SelectIO Resources User Guide (UG571)
Document ID
UG571
Release Date
2023-08-31
Revision
1.15 English

Some I/O standards (POD10, POD12, HSUL_12, and DIFF_HSUL_12) require an input termination resistance (R) to a V TT voltage of V CCO (see This Figure ).

Figure 1-12: Input Termination to V CCO without DCI (where R = Z 0 )

X-Ref Target - Figure 1-12

X16070-input-term-to-vcco-without-dci-where-r-is-z0.jpg

The DCI input standards supporting single termination are shown in Table: All DCI I/O Standards Supporting Single-Termination DCI .

Table 1-4: All DCI I/O Standards Supporting Single-Termination DCI

POD12_DCI

DIFF_POD12_DCI

HSUL_12_DCI

POD10_DCI

DIFF_POD10_DCI

DIFF_HSUL_12_DCI

Single-termination DCI creates a termination to V CCO internally as shown in This Figure . Value of the termination resistor is determined by the ODT attribute. Possible values for ODT:

• POD standards only: RTT_40, RTT_48, and RTT_60

• HSUL_12_DCI and DIFF_HSUL_12_DCI only: RTT_120 and RTT_240

• RTT_NONE

Figure 1-13: Input Termination to V CCO using Single-Termination DCI (where R = Z 0 )

X-Ref Target - Figure 1-13

X16071-input-term-to-vcco-using-single-term-dci-where-r-is-z0.jpg

For example, to achieve single termination of approximately 50 Ω to V CCO for the POD12_DCI standard, a 240 Ω external precision resistor is required at the VRP pin, ODT must be set to the value RTT_48.