HSLVDCI

The driver is identical to LVDCI, while the input is identical to HSTL and SSTL. By using a V _REF -referenced input, high-speed LVDCI (HSLVDCI) allows greater input sensitivity at the receiver than when using a single-ended LVCMOS-type receiver.

The HP I/O banks have a controlled impedance output driver to provide series termination without external-source termination resistors. The exact value of the impedance is set by the OUTPUT_IMPEDANCE attribute and an external 240 Ω resistor on the VRP pin. The only valid value of the OUTPUT_IMPEDANCE attribute for HSLVDCI standards is RDRV_48_48, which corresponds to a 48 Ω setting.

A sample circuit illustrating bidirectional termination techniques for an HSLVDCI controlled impedance driver is shown in This Figure . The DCI I/O standards supporting a controlled impedance driver with a V _REF referenced input are: HSLVDCI_15 and HSLVDCI_18.

For electrical specifications, see the LVDCI V _OH and V _OL entries in the UltraScale device data sheets [Ref 2] .

Table: Allowed Attributes for the HSLVDCI I/O Standards details the allowed attributes that can be applied to the HSLVDCI I/O standard. This standard is available in the HP I/O banks. Support is implied for primitives that are derivatives of the primitives listed in Table: Allowed Attributes for the HSLVDCI I/O Standards (for example: *_DIFF_OUT, *_DCIEN, *_IBUFDISABLE, or *_INTERMDISABLE). Refer to the SelectIO Interface Primitives section for all supported derivatives.