eFUSEs are nonvolatile one-time-programmable (OTP) cells used for some device settings, the factory-programmed Device DNA, and these user-programmable elements:
- AES-GCM encryption key
- RSA authentication key
- EFUSE_USR user value
- Control and security settings
The fuse link is programmed (or burned or blown) by flowing a
large current for a specific amount of time. The resistance of a programmed fuse link is
typically a few orders of magnitude higher than that of a pristine or unprogrammed fuse. A
programmed fuse is assigned a logic value of 1, and a pristine fuse has a
logic value of 0. User-programmable eFUSEs can be programmed with the AMD configuration tools (see
Vivado Design Suite User Guide:
Programming and Debugging (UG908)). eFUSE
must not be programmed during device configuration activity. When in-system programming eFUSE,
apply the following to minimize system activity and FPGA interface activity to reduce risks
from system noise on JTAG signals or eFUSE circuits:
- Avoid device configuration, configuration readback, and readback CRC
- Temporarily change configuration mode pin settings from a master mode setting to the JTAG only mode setting
- Disable system clock sources
The Device DNA is a 96-bit eFUSE value that is factory-programmed and unique for each device. JTAG or the DNA_PORTE2 primitive is used to access the value. See Device Identifier (Device DNA) for more details.
The JTAG interface can be used to program the FUSE_USER 32-bit value. JTAG or the EFUSE_USR primitive is then used to access the data. See EFUSE_USR in Design Entry.
The FPGA logic can access only the FUSE_USER register and the Device DNA. All other eFUSE bits are not accessible from the FPGA logic.