Status Pin Handling - Status Pin Handling - UG570

UltraScale Architecture Configuration User Guide (UG570)

Document ID
UG570
Release Date
2025-03-04
Revision
1.20.1 English

There are physical status pins that are recommended to be accessible on the board for debug. The two most important signals are the INIT_B and DONE signals. The pulsing of INIT_B from Low to High indicates the completion of initialization at power-up, and then a falling INIT_B signal later in the process can indicate a CRC error. Having access to the INIT_B and DONE signals is critical for FPGA configuration debug.

In addition to the status signals, there are key configuration pins that provide helpful information and should be handled carefully to prevent problems during configuration. These pins are listed below:

  • Mode pins M[2:0]
  • PROGRAM_B pin
  • CFGBVS pin
  • PUDC_B pin