SelectMAP Data Ordering - SelectMAP Data Ordering - UG570

In many cases, SelectMAP configuration is driven by a user application residing on a microprocessor, CPLD, or in some cases another FPGA. In these applications, it is important to understand how the data ordering in the configuration data file corresponds to the data ordering expected by the FPGA.

In SelectMAP x8 mode, configuration data is loaded at one byte per CCLK, with the MSB of each byte presented to the D00 pin. This convention (D00 = MSB, D07 = LSB) differs from many other devices. This convention can be a source of confusion when designing custom configuration solutions. The following table shows how to load the hexadecimal value 0xABCD into the SelectMAP data bus.

Some applications can accommodate the non-conventional data ordering without difficulty. For other applications, it can be more convenient for the source configuration data file to be bit swapped, meaning that the bits in each byte of the data stream are reversed. For these applications, the AMD tools can generate bit-swapped files.

The following table shows the bit ordering for the SelectMAP x8, x16, and x32 data bus widths.