Readback Abort Sequence Description - Readback Abort Sequence Description - UG570

UltraScale Architecture Configuration User Guide (UG570)
Document ID
UG570
Release Date
2025-03-04
Revision
1.20.1 English

An ABORT is signaled during readback as follows (see the following figure):

  1. The readback sequence begins normally.
  2. The user pulls the RDWR_B pin Low synchronous to CCLK while the device is selected (CSI_B asserted Low).
  3. The ABORT ends when CSI_B is deasserted.
Figure 1. Readback Abort Sequence

ABORTs during readback are not followed by a status word because the RDWR_B signal is set for write control (FPGA D[x:00] pins are inputs).