RS Pins - RS Pins - UG570

UltraScale Architecture Configuration User Guide (UG570)

Document ID
UG570
Release Date
2025-03-04
Revision
1.20.1 English

The dual-purpose RS pins are disabled by default. The RS pins drive Low during a fallback for Master BPI configuration mode. For initial MultiBoot systems, the RS pins are wired to upper address bits of the flash and strapped High or Low with a pull-up or pull-down resistor, respectively. At power-up, the system boots to the upper address space defined by the pull-up resistors on the RS and address line connections. During a fallback, the RS pins drive Low and the device boots from address space 0. The RS pins should be tied to upper addresses defined by the system to allow for full bit files to be stored in each memory segment.

Tying the RS pins to the flash upper address pins allows for easy selection between up to four images. When using this feature with the basic BPI asynchronous read, you should be aware that the bitstream size must be equal or less than one fourth the size of the flash as the RS pins are held at a static value allowing access to one fourth of the flash with one selection.