The configuration mode(s) used in an application can affect the planning of the design pin-out. It is important to determine and plan for the configuration modes before beginning floorplanning or pin selection. The configuration mode not only determines the connectivity of selected pins, it also determines the VCCO voltage required for the I/O bank that includes multi-function pins.
To determine the proper pin settings follow this procedure:
- Determine the configuration mode(s) for the FPGA. Be sure to account not only for the primary configuration mode, but any additional configuration modes that are used for debugging or updates.
- Determine the set of pins and the bank locations for both the primary and secondary configuration modes planned.
- Determine how each of these pins are used and any restrictions placed on design usage as standard I/O. Consider internal and external pull-ups or pull-downs, connections to external devices, etc.
- For each set of configuration pins, determine the common required I/O voltage support for the required configuration bank(s). Only compatible I/O standards can be used elsewhere in that bank.