Before configuring an UltraScale FPGA from a parallel NOR flash memory device, the flash must be programmed with the configuration data. Parallel NOR flash devices have a single interface for programming. Three primary methods to deliver the data to this interface follow:
- Off-board production programming by
a third-party programmer, such as from BPM Microsystems or Data I/O.
Refer to the selected flash vendor website for production
programming support details.
- This production programming method should be considered if the most critical factor is to decrease flash programming times for a high-volume production application. Off-board programming can often deliver faster programming times because they can limit overhead by interfacing directly to the flash. This solution can also make use of the enhanced programming higher voltage option.
- In-system production programming
with a third-party vendor JTAG tool programming solution.
- This method is popular if on-board production programming is required, but this method will be slower than off-board programming.
- Indirect in-system low-volume prototyping programming with
Vivado Device Programmer
- This method is popular if programming must be done on-board. This method can accommodate multiple design iterations and is extremely useful for debugging in a lab environment. The Vivado programming tool will provide the ability to program a parallel NOR flash indirectly. An FPGA design bitstream is downloaded first to provide a connection from the Vivado tools through the FPGA to the parallel NOR flash. When using this method it is important to recognize that the previous FPGA memory design contents are lost during the flash operations. I/O signals that are not a part of the master BPI configuration mode interface are disabled. You must understand the behavior of the FPGA during this process and how it can affect other devices in the system. Refer to Vivado Design Suite User Guide: Programming and Debugging (UG908) for the specific flash family members supported by the programming tools.
For step-by-step instructions for using the BPI configuration mode with parallel NOR flash, see UltraScale FPGA BPI Configuration and Flash Programming (XAPP1220).