Generally, each FPGA in a system has a unique bitstream. Multiple, different FPGA bitstreams can share a single configuration flash memory by leveraging a configuration daisy-chain. However, if all the FPGAs in the application have the same part number and use the same bitstream, only a single bitstream image is required, and programming can be done through ganged configuration. Ganged configuration is supported in the slave serial and slave SelectMAP modes, and in BPI asynchronous read mode.