The following figure shows the general functionality of the DNA_PORTE2 design primitive. An FPGA application must first instantiate the DNA_PORTE2 primitive, shown in the previous figure, within a design. As shown in the following figure, the Device DNA value is 96 bits long. The two LSBs and two MSBs have fixed values that can be used to detect the LSB and MSB of the 96-bit DNA.
To read the Device DNA, the FPGA application
must first transfer the identifier value into the DNA_PORTE2 output shift register. The READ
input must be asserted during a rising edge of CLK, as shown in the following table. This
action parallel loads the output shift register with all 96 bits of the identifier. The LSB of
the DNA value (DNA[0]=1) appears on DOUT immediately after the load. The READ
operation overrides a SHIFT operation, so READ should be asserted for at least one clock cycle
and then removed.
| Operation | DIN | READ | SHIFT | CLK | Shift Register | DOUT |
|---|---|---|---|---|---|---|
| HOLD | X | 0 | 0 | X | Hold previous value | Hold previous value |
| READ | X | 1 | X | ↑ | Parallel load with 96-bit ID | Bit 0 of Identifier |
| SHIFT | DIN | 0 | 1 | ↑ | Shift DIN into bit 95, shift contents of shift register toward DOUT | Bit 0 of shift register |
|
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To continue reading the identifier values, assert SHIFT followed by a rising edge of CLK, as shown in the previous table. This action causes the output shift register to shift its contents toward the DOUT output. The value on the DIN input is shifted into the shift register. All shift register functionality is synchronous to the CLK.