Control Register 1 (11000) - Control Register 1 (11000) - UG570

UltraScale Architecture Configuration User Guide (UG570)

Document ID
UG570
Release Date
2025-03-04
Revision
1.20.1 English

Control register 1 (CTL1) is used to configure the device. This register is reserved except for the CAPTURE bit. Writes to the CTL1 register are masked by the value in the MASK register. The name of each bit position in the CTL1 register is given in the following table and described in the subsequent table.

Table 1. Control Register 1 (CTL1)
Description Reserved CAPTURE Reserved
Bit Index 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Value x x x x x x x x 0 x x x x x x x x x x x x x x x x x x x x x x x
Table 2. Control Register 1 Description
Name Bit Index Description
CAPTURE 23

Controls readback capture enable:

0: Disables readback capture (default)

1: Enables readback capture