During the configuration process, there are some basic checks that can be performed to help isolate an issue. AMD FPGA bitstreams have a unique header. The header includes a synchronization word and can include an auto detect, a configuration clock type, and a rate setting. For AMD UltraScale™ architecture-based FPGAs, this sync word is shown:
AA995566The sync word is a valuable debug parameter. You can scope the data pins
and when you see the synchronization word, you know that the bitstream header is seen.
Shortly after this, there should be transitions of the increased configuration clock
rate if the configuration rate speed-up or external master CCLK
(EMCCLK) options are used.