After synchronization, the configuration logic processes each 32-bit data word as a configuration packet or component of a multiple word configuration packet. The following table shows the composition of a sample KU040 bitstream, generated using default settings.
| Configuration Data Word (hex) | Description |
|---|---|
FFFFFFFF
|
Dummy pad word, word 1 |
FFFFFFFF
|
Dummy pad word, word 2 |
| … | Dummy pad words 3-15 |
FFFFFFFF
|
Dummy pad word, word 16 |
000000BB
|
Bus width auto detect, word 1 |
11220044
|
Bus width auto detect, word 2 |
FFFFFFFF
|
Dummy pad word |
FFFFFFFF
|
Dummy pad word |
AA995566
|
Sync word |
20000000
|
NOOP |
20000000
|
NOOP |
30022001
|
Packet Type 1: Write TIMER register, WORD_COUNT = 1 |
00000000
|
TIMER[31:0] =
(Placeholder for optional watchdog timer) |
30020001
|
Packet Type 1: Write WBSTAR register, WORD_COUNT = 1 |
00000000
|
WBSTAR[31:0] =
(Placeholder for optional MultiBoot next config address) |
30008001
|
Packet Type 1: Write CMD register, WORD_COUNT=1 |
00000000
|
CMD[4:0] =
(Placeholder for optional MultiBoot next config reboot IPROG command) |
20000000
|
NOOP |
30008001
|
Packet Type 1: Write CMD register, WORD_COUNT=1 |
00000007
|
CMD[4:0]= (Bitstream CRC coverage begins here) |
20000000
|
NOOP |
20000000
|
NOOP |
30002001
|
Packet Type 1: Write FAR register, WORD_COUNT=1 |
00000000
|
FAR (Frame address) =
00000000 (hex) |
30026001
|
Packet Type 1: Write reserved/unused register, WORD_COUNT=1 |
00000000
|
Unused value =
00000000 (hex) |
30012001
|
Packet Type 1: Write COR0 register, WORD_COUNT = 1 |
02003FE5
|
COR0[31:0] =
(Sets configuration options, for example, EMCCLK, CCLK frequency, startup sequence) |
3001C001
|
Packet Type 1: Write COR1 register, WORD_COUNT = 1 |
00000000
|
COR1[31:0] =
(Sets configuration options, for example, BPI page mode) |
30018001
|
Packet Type 1: Write IDCODE register, WORD_COUNT = 1 |
03822093
|
IDCODE[31:0] = 03822093 (hex) (If written IDCODE does not match device IDCODE, then error) |
30008001
|
Packet Type 1: Write CMD register, WORD_COUNT = 1 |
00000009
|
CMD[4:0]=01001 (binary) = SWITCH (change CCLK frequency) |
20000000
|
NOOP |
3000C001
|
Packet Type 1: Write MASK register, WORD_COUNT = 1 |
00000000
|
Bit mask for write to
CTL0/CTL1 register. MASK[31:0] = 00000000 (hex) |
3000A001
|
Packet Type 1: Write CTL0 register, WORD_COUNT = 1 |
00000501
|
CTL0[31:0] =
(Sets configuration control options, for example, fallback, readback, etc.) |
3000C001
|
Packet Type 1: Write MASK register, WORD_COUNT = 1 |
00000000
|
Bit mask for write to
CTL0/CTL1 register. MASK[31:0] = 00000000 (hex) |
30030001
|
Packet Type 1: Write CTL1 register, WORD_COUNT = 1 |
00000000
|
CTL1[31:0] =
(Sets configuration control options; Reserved for future use) |
20000000
|
NOOP |
20000000
|
NOOP |
20000000
|
NOOP |
20000000
|
NOOP |
20000000
|
NOOP |
20000000
|
NOOP |
20000000
|
NOOP |
20000000
|
NOOP |
30002001
|
Packet Type 1: Write FAR register, WORD_COUNT = 1 |
00000000
|
FAR (Frame address) =
00000000 (hex) |
30008001
|
Packet Type 1: Write CMD register, WORD_COUNT = 1 |
00000001
|
CMD[4:0] =
00001 (binary) = WCFG (Write configuration data) |
20000000
|
NOOP |
30004000
|
Packet Type 1: Write FDRI register, WORD_COUNT = 0 |
503D0DA6
|
Packet Type 2: Write FDRI register, WORD_COUNT = 4,001,190 |
00000000
|
FDRI data word 1 (First bitstream configuration data word) |
00000000
|
FDRI data word 2 |
| … | FDRI data words 3 – 4,001,189 |
00000000
|
FDRI data word 4,001,190 (Last bitstream configuration data word) |
30000001
|
Packet Type 1: Write CRC register, WORD_COUNT = 1 |
C81874CB
|
CRC[31:0] =
(If written CRC does not match computed CRC value, then error) |
20000000
|
NOOP |
20000000
|
NOOP |
30008001
|
Packet Type 1: Write CMD register, WORD_COUNT = 1 |
0000000A
|
CMD[4:0] =
01010 (binary) = GRESTORE (Pulse GRESTORE signal) |
20000000
|
NOOP |
30008001
|
Packet Type 1: Write CMD register, WORD_COUNT = 1 |
00000003
|
CMD =
00011 (binary) = DGHIGH/LFRM (De-assert GHIGH_B) |
20000000
|
NOOP |
| … | … |
20000000
|
NOOP |
30008001
|
Packet Type 1: Write CMD register, WORD_COUNT = 1 |
00000005
|
CMD[4:0] =
00101 (binary) = START (Begin STARTUP sequence) |
20000000
|
NOOP |
30002001
|
Packet Type 1: Write FAR register, WORD_COUNT = 1 |
03BE0000
|
FAR (Frame address) =
03BE0000 (hex) |
3000C001
|
Packet Type 1: Write MASK register, WORD_COUNT = 1 |
00000100
|
Bit mask for write to
CTL0/CTL1 register. MASK[31:0] = 00000100 (hex) |
3000A001
|
Packet Type 1: Write CTL0 register, WORD_COUNT = 1 |
00000501
|
CTL0[31:0] =
(Sets configuration control options, for example, fallback, readback, etc.) |
30000001
|
Packet Type 1: Write CRC register, WORD_COUNT = 1 |
E3AD7EA5
|
CRC[31:0] =
(If written CRC does not match computed CRC value, then error) |
20000000
|
NOOP |
20000000
|
NOOP |
30008001
|
Packet Type 1: Write CMD register, WORD_COUNT = 1 |
0000000D
|
CMD[4:0] =
01101 (binary) = DESYNC (Reset DALIGN) (Requires new Sync
word) |
20000000
|
NOOP (Pad remainder of bitstream with NOOPs) |
| … | … |
20000000
|
NOOP (End of bitstream) |