ABORT Status Word - ABORT Status Word - UG570

UltraScale Architecture Configuration User Guide (UG570)
Document ID
UG570
Release Date
2025-03-04
Revision
1.20.1 English

During the configuration ABORT sequence, the device drives a status word onto the D[00:07] pins. The status bits do not bit-swap. The other data pins are always High. The key for the status word is given in the following table.

Table 1. ABORT Status Word
Bit Number Status Bit Name Meaning
D07 CFGERR_B

Configuration error (active Low)

  • 0 = A configuration error has occurred.
  • 1 = No configuration error.
D06 DALIGN

Sync word received (active High)

  • 0 = No sync word received.
  • 1 = Sync word received by interface logic.
D05 RIP

Readback in progress (active High)

  • 0 = No readback in progress.
  • 1 = A readback is in progress.
D04 IN_ABORT_B

ABORT in progress (active Low)

  • 0 = Abort is in progress.
  • 1 = No abort in progress.
D03-D02 RSVD Reserved status bits
D01-D00 11 Fixed to ones.

The ABORT sequence lasts four CCLK cycles. During those cycles, the status word changes to reflect data alignment and ABORT status. A typical sequence might be:

11011111 => DALIGN = 1, IN_ABORT_B = 1
10001111 => DALIGN = 0, IN_ABORT_B = 0
10001111 => DALIGN = 0, IN_ABORT_B = 0
10001111 => DALIGN = 0, IN_ABORT_B = 0

After the last cycle, the synchronization word can be reloaded to establish data alignment.