AMD recommends using generic HDL code and allowing the tools to infer the usage of CLB resources. Using IP solutions designed for 7 series FPGAs can help make full use of the CLB resources. Although any feature in the CLB can be instantiated directly, including the LUTs, carry logic, and sequential elements, instantiation should be reserved primarily for specifying when resources outside the CLB should be used, such as the DSP slice. Instantiation might also be needed if the synthesis tool does not infer a desired special CLB resource, such as the wide multiplexers, distributed RAM, or SRL feature.