Carry logic can be inferred or instantiated. Using macros designed for the 7 series FPGA can provide the most flexibility and efficiency, especially for more complex functions.
Unimacros include adders, counters, comparators, multipliers, and multiplier/accumulators. The unimacros use the DSP48E1 slice.
The AMD IP includes a similar set of functions. When defining these functions, the user can specify whether the implementation should be in the CLB carry logic or in the DSP48E1 slice.
The carry logic runs vertically up every other column of slices (SLICEL and SLICEM). The AMD tools automatically place logic in a column when the carry logic is used. When floorplanning, carry logic based functions should always be specified as a group to avoid unnecessary breaks in the carry chain. Carry logic cannot be cascaded across super logic regions (SLRs) in devices using stacked silicon interconnect (SSI) technology.