When S is High, all other inputs are overridden and the data output (Q) is driven High on the active clock transition. This signal is available in the FDSE component. The FDSE flip-flop is also preset by default on power-up.
When S is High, all other inputs are overridden and the data output (Q) is driven High on the active clock transition. This signal is available in the FDSE component. The FDSE flip-flop is also preset by default on power-up.