Eight primitives are shown in the following table. Three primitives are single-port RAM, three primitives are dual-port RAM, and two primitives are quad-port RAM.
| Primitive | RAM Size | Type | Address Inputs |
|---|---|---|---|
| RAM32X1S | 32-bit | Single-port | A[4:0] (read/write) |
| RAM32M | 32-bit | Quad-port |
ADDRA[4:0] (read) ADDRB[4:0] (read) ADDRC[4:0] (read) ADDRD[4:0] (read/write) |
| RAM64X1S | 64-bit | Single-port | A[5:0] (read/write) |
| RAM64X1D | 64-bit | Dual-port |
A[5:0] (read/write) DPRA[5:0] (read) |
| RAM64M | 64-bit | Quad-port |
ADDRA[5:0] (read) ADDRB[5:0] (read) ADDRC[5:0] (read) ADDRD[5:0] (read/write) |
| RAM128X1S | 128-bit | Single-port | A[6:0] (read/write) |
| RAM128X1D | 128-bit | Dual-port | A[6:0], (read/write) DPRA[6:0] (read) |
| RAM256X1S | 256-bit | Single-port | A[7:0] (read/write) |
The input and output data are one bit wide (with the exception of the quad-port RAM).
The following figure shows generic single-port, dual-port, and quad-port distributed RAM primitives. The A, ADDR, and DPRA signals are address buses.
Figure 1. Single-Port, Dual-Port, and Quad-Port Distributed RAM
Primitives
Instantiating several distributed RAM primitives can be used to implement wide memory blocks.