Read Only Memory (ROM) - UG474

7 Series FPGAs Configurable Logic Block User Guide (UG474)

Document ID
UG474
Release Date
2025-04-01
Revision
1.9 English

Each function generator in both SLICEMs and SLICELs can implement a 64 x 1-bit ROM. Three configurations are available: ROM64X1, ROM128X1, and ROM256X1. ROM contents are loaded at each device configuration. The following table shows the number of LUTs occupied by each ROM configuration size.

Table 1. ROM Configuration
ROM Number of LUTs
64 x 1 1
128 x 1 2
256 x 1 4