Function generators and associated multiplexers in 7 series FPGAs can implement these functions:
- 4:1 multiplexers using one LUT
- Four 4:1 MUXes per slice
- 8:1 multiplexers using two LUTs
- Two 8:1 MUXes per slice
- 16:1 multiplexers using four LUTs
- One 16:1 MUX per slice
These wide input multiplexers are implemented in one level of logic (or LUT) using the dedicated F7AMUX, F7BMUX, and F8MUX multiplexers. These multiplexers allow LUT combinations of up to four LUTs in a slice. The wide multiplexers can also be used to create general-purpose functions of up to 13 inputs in two LUTs or 27 inputs in four LUTs (one slice). Although the multiplexer outputs are combinatorial, they can be registered in the CLB storage elements.