Guide Contents - UG474

7 Series FPGAs Configurable Logic Block User Guide (UG474)

Document ID
UG474
Release Date
2025-04-01
Revision
1.9 English

This manual contains these chapters:

  • Overview provides basic information needed for the majority of users, including:
    • CLB Overview is targeted at the new user.
    • 7 Series CLB Features discusses what is new compared with the AMD Spartan™ 6 and Virtex 6 FPGA families for the experienced user and provides design migration considerations.
    • Device Resources indicates the number of resources per device, and unity between different 7 series families.
    • Recommended Design Flow provides the basics of using CLB resources and lists key aspects to consider.
    • Pin-out Planning discusses aspects of CLBs that might affect pin placement for a design.
  • Functional Details, lists architectural specifics for each CLB feature.
  • Design Entry, provides design entry guidelines and primitives for instantiation.
  • Applications, provides examples that use the CLB resources in larger applications.
  • Timing, contains timing models and defines CLB timing specifications from the respective 7 series FPGA data sheet.
  • Advanced Topics, discusses advanced features of the 7 series CLB.