Distributed RAM provides a trade-off between using storage elements for very small arrays and block RAM for larger arrays. It is recommended to infer memory where possible to provide the greatest flexibility. Distributed RAM can also be targeted by instantiation or through the use of AMD LogiCORE™ IP.
In general, distributed RAM should be used for all memories that consist of 64 bits or less, unless there is a shortage of SLICEM or logic resources for the target device. Distributed RAM is more efficient in terms of resources, performance, and power.
For depths greater than 64 bits but less than or equal to 128 bits, the decision on the best resource to use depends on these factors:
- The availability of extra block RAMs. If not available, distributed RAM should be used.
- The latency requirements. If asynchronous read capability is needed, distributed RAMs must be used.
- The data width. Widths greater than 16 bits should use block RAM, if available.
- The necessary performance requirements. Registered distributed RAMs generally have shorter clock-to-out timing and fewer placement restrictions than block RAMs.