AMD created the Advanced Silicon Modular Block (ASMBL) architecture to enable FPGA platforms with varying feature mixes optimized for different application domains. Through this innovation AMD offers a greater selection of devices, enabling customers to select the FPGA with the right mix of features and capabilities for their specific design. Figure 1 provides a high-level description of the different types of column-based resources.
The ASMBL architecture breaks through traditional design barriers by:
- Eliminating geometric layout constraints such as dependencies between I/O count and array size.
- Enhancing on-chip power and ground distribution by allowing power and ground to be placed anywhere on the chip.
- Allowing disparate integrated IP blocks to be scaled independent of each other and surrounding resources.
SSI Technology
The 7 series FPGAs extend integration even higher by using the unique stacked silicon interconnect (SSI) technology. SSI technology enables multiple super logic regions (SLRs) to be combined on a passive interposer layer, to create a single FPGA with more than ten thousand inter-SLR connections. See Advanced Topics for additional information.