7 Series FPGA CLB Resources - UG474

7 Series FPGAs Configurable Logic Block User Guide (UG474)

Document ID: UG474
Release Date: 2025-04-01
Revision: 1.9 English

Table 1 through Table 3 show the available CLB resources for the Artix 7, Kintex 7, and Virtex 7 FPGAs. Refer to 7 Series FPGAs Data Sheet: Overview (DS180) for the most up-to-date information.

Table 1. Artix 7 FPGA CLB Resources
Device	Slices⁽¹⁾	SLICEL	SLICEM	6-input LUTs	Distributed RAM (Kb)	Shift Register (Kb)	Flip-Flops
7A15T	2,600⁽²⁾	1,800	800	10,400	200	100	20,800
7A35T	5,200⁽²⁾	3,600	1,600	20,800	400	200	41,600
7A50T	8,150	5,750	2,400	32,600	600	300	65,200
7A75T	11,800⁽²⁾	8,232	3,568	47,200	892	446	94,400
7A100T	15,850	11,100	4,750	63,400	1,188	594	126,800
7A200T	33,650	22,100	11,550	134,600	2,888	1,444	269,200
Each 7 series FPGA slice contains four LUTs and eight flip-flops; only SLICEMs can use their LUTs as distributed RAM or SRLs. Number of slices corresponding to the number of LUTs and flip-flops supported in the device.

Table 2. Kintex 7 FPGA CLB Resources
Device	Slices⁽¹⁾	SLICEL	SLICEM	6-input LUTs	Distributed RAM (Kb)	Shift Register (Kb)	Flip-Flops
7K70T	10,250	6,900	3,350	41,000	838	419	82,000
7K160T	25,350	16,600	8,750	101,400	2,188	1,094	202,800
7K325T	50,950	34,950	16,000	203,800	4,000	2,000	407,600
7K355T	55,650	35,300	20,350	222,600	5,088	2,544	445,200
7K410T	63,550	40,900	22,650	254,200	5,663	2,831	508,400
7K420T	65,150⁽²⁾	41,400	23,750	260,600	5,938	2,969	521,200
7K480T	74,650	47,500	27,150	298,600	6,788	3,394	597,200
Each 7 series FPGA slice contains four LUTs and eight flip-flops; only SLICEMs can use their LUTs as distributed RAM or SRLs. Number of slices corresponding to the number of LUTs and flip-flops supported in the device.

Table 3. Virtex 7 FPGA CLB Resources
Device	Slices⁽¹⁾	SLICEL	SLICEM	6-input LUTs	Distributed RAM (Kb)	Shift Register (Kb)	Flip-Flops
7V585T	91,050	63,300	27,750	364,200	6,938	3,469	728,400
7V2000T	305,400	219,200	86,200	1,221,600	21,550	10,775	2,443,200
7VX330T	51,000	33,450	17,550	204,000	4,388	2,194	408,000
7VX415T	64,400	38,300	26,100	257,600	6,525	3,263	515,200
7VX485T	75,900	43,200	32,700	303,600	8,175	4,088	607,200
7VX550T	86,600⁽²⁾	51,700	34,900	346,400	8,725	4,363	692,800
7VX690T	108,300	64,750	43,550	433,200	10,888	5,444	866,400
7VX980T	153,000	97,650	55,350	612,000	13,838	6,919	1,224,000
7VX1140T	178,000	107,200	70,800	712,000	17,700	8,850	1,424,000
7VH580T	90,700	55,300	35,400	362,800	8,850	4,425	725,600
7VH870T	136,900	83,750	53,150	547,600	13,275	6,638	1,095,200
Each 7 series FPGA slice contains four LUTs and eight flip-flops; only SLICEMs can use their LUTs as distributed RAM or SRLs. Number of slices corresponding to the number of LUTs and flip-flops supported in the device.